This invention relates, in general, to methods of manufacturing semiconductor components, and more particularly, to plating metal layers and plating tools therefor.
The manufacturing of semiconductor components typically includes the plating of metal layers over a semiconductor substrate. However, plating processes have many problems. For example, the plating of a front surface of a semiconductor substrate typically also results in the undesired plating of the edge and back surfaces of the semiconductor substrate, and this undesired plating must be removed. The removal of the undesired plating requires several extra processing steps and increases the cost and duration of the manufacturing process. The extra steps also increase the probability of substrate breakage. Futhermore the plating techniques also suffer from poor process control. For example, the thickness of the plated metal layer typically varies substantially across the semiconductor substrate, and it is also difficult to determine precisely when the plated metal layer has its desired thickness and when the plating process should be teriated. One reason for the poor process control is the use of cathode contacts to puncture through a photoresist layer to contact a metal seed layer.
Accordingly, a need exists for a method of manufacturing a semiconductor component that uses a plating technique eliminating or at least substantially reducing the undesired plating of the edge and back surfaces of the semiconductor substrate. It is desired for the plating technique to also have adequate process control. Furthermore, to achieve the desired manufacturing method, a need also exists for a plating tool that prevents or at least reduces plating on the edge and back surfaces of a semiconductor substrate and that enables adequate process control.